SiC is excellent as a semiconductor material in physical properties and electric properties in comparison with silicon of the main current at present. Concretely, a forbidden band width is three times and an insulation breakdown electric field is 7 times and the coefficient of thermal conductivity is three times larger than those of silicon, respectively. Therefore, SiC is expected as a semiconductor material for realizing a high power and super low loss element of the next generation.
For example, there is a structure shown in U.S. Pat. No. 6,570,185 as a vertical type power MOSFET of a trench type using this SiC. FIG. 44 shows the sectional construction of this power MOSFET.
As shown in FIG. 44, in the power MOSFET, an N− type drift layer 102 is formed on the surface of an N+ type SiC substrate 101. An N type area 103 and a P+ type base area 104 are sequentially formed on the N− type drift layer 102. An N+ type source area 105 is formed in a surface layer portion of the P+ type base area 104. Further, a trench 106 is formed so as to extend through the N+ type source area 105, the P+ type base area 104 and the N type area 103 and to reach the N− type drift layer 102. A gate electrode 108 is formed within this trench 106 through a gate oxide film 107. A P+ type layer 109 is formed on the bottom face of the trench 106.
In the vertical type power MOSFET as a trench type MOSFET, impurities are generally doped into the gate oxide film 107. An interface level density at the interface of the gate oxide film 107 and SiC, or a fixing electric charge density within the gate oxide film 107 can be reduced by such doping of the impurities. Thus, performance, reliability, etc. of the power MOSFET can be improved.
Here, for example, N (i.e., nitrogen) is used as the impurities doped to the gate oxide film 107 as mentioned above.
Concretely, as shown in Das et al. “High Mobility 4H-SiC Inversion Mode MOSFETs Using Thermally Grown, NO Annealed SiO2”, IEEE Device Research Conference, Denver in Colorado, Jun. 19 to 21, 2000 and Chung et al., “Effect of nitric oxide annealing on the interface trap densities near the band edges in the 4H polytype of silicon carbide” Applied Physics Letters, Vol. 76, No. 13, pp. 1713-1715, March, 2000, nitrogen is taken into the gate oxide film 107 by anneal processing using NO (i.e., nitrogen oxide gas). As shown in Xu et al., “Improved Performance and Reliability of N20-Grown Oxy-nitride on 6H-SiC” IEEE Electron Device Letters, Vol. 21, No. 6, pp. 298-300, June, 2000, nitrogen is taken into the gate oxide film 107 by performing gate oxidation for taking N2O (i.e., nitrous oxide gas) into an atmosphere and anneal processing using N2 (i.e., nitrogen gas).
However, in the anneal processing using the NO gas, it is not preferable when an influence on a human body influenced by the NO gas is considered. Further, when the gate oxidation using the N2O gas is performed, heat treatment of a high temperature of about 1300° C. must be taken for a long time of 360 minutes to take the nitrogen atom into the gate oxide film 107. Therefore, a problem exists in that no power MOSFET can be efficiently manufactured.